Bound-T Target Processors

The Bound-T execution-time analyzer has so far been adapted to the following target processors. In other words, Bound-T is able to compute upper bounds on the worst-case execution time for binary programs for these processors.

General 8-bit processors

Intel-8051 Series
The Intel-8051 (also known as MCS-51) is a large family of 8-bit microcontrollers. Intel and other companies produce different chips which execute the same instruction set, or some extension, and have different types of on-chip peripherals. Bound-T is sensitive only to the instruction set. Bound-T does not emulate or model the peripherals, because it is concerned only with the instruction execution time. The I/O timing is generally analysed separately, for example by a Rate Monotonic algorithm.
Intel 8051 Application Note (pdf)

General 32-bit processors

SPARC V7
The SPARC V7 is a 32-bit RISC processor with a single pipeline but a separate and concurrent Integer Unit and Floating Point Unit. Bound-T has been targeted specifically to the ERC32 implementation by ATMEL, a radiation-tolerant SPARC V7 chip with built-in error controls. Bound-T should work also for other implementations, although minor adaptations may be needed if there are differences in detailed instruction timing.
ERC32/SPARC V7 Application Note (pdf)

Digital Signal Processors

Analog Devices ADSP-21020
The ADSP-21020 is a 32-bit floating-point DSP. It is the predecessor of the well-known SHARC chip from Analog Devices, which is essentially a 21020 with cache and some new instructions. Bound-T has been targeted specifically to the TSC21020 implementation by ATMEL, a radiation-tolerant chip. Bound-T should work also for other implementations.
ADSP21020 Application Note (pdf)

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